BAE Foundry

BAE logo

BAE Photonic Features

  • Single ridge, Strip-Loaded (Slab), and Slotted Waveguides
  • Ge PIN detectors
  • Dedicated Waveguide Implants: P vertical, P angled, N vertical, N angled
  • Salicided heaters in Waveguide Region
  • 2 µ BOX
  • Final Via to Silicon for access to Slots and Waveguides

CMOS Features

  • CMOS Technology in 180 nm PDSOI
  • VDD = 1.8V±10%, 3.3V±10%,
  • Optional High Voltage (DGO) NFET AND PFET
  • Operating temperature range of 0ºC to 70ºC
  • Low resistance salicided N+ and P+ polysilicon and diffusions
  • Five levels of metal
  • Metal 4, Metal 5 thick metal for inductors
  • MIM Capacitor at Metal 3
  • Planarized passivation and inter-level dielelectrics

BAE Foundry Opening

OpSIS joined forces with BAE Systems in Manassas Virginia to open their foundry capabilities to the entire OpSIS community. On September 28, 2011 we celebrated this joint effort with an event at their CMOS fabrication facility in Manassas, which included both talks and a tour of their cleanroom facility.

Featured Speakers

Ian McDonald
Master of Ceremonies
Ian McDonald,
Director of Space Products and Systems,
BAE Systems

Michael Hochberg
OpSIS Program Overview
Michael Hochberg,
Associate professor, University of Delaware
Director, Institute for Photonic Integration

Mario Paniccia
Silicon Photonics at Intel
Mario Paniccia,
Director, Photonics Technology Lab,
Intel Corp.

Rich Powers
Photonics Applications for Military and Defense
Rich Powers,
Technical Director of Engineering for ISR Solutions,
BAE Systems

Gernot Pomrenke
Group IV Photonics Research for Defense Applications
Gernot S. Pomrenke,
Program Manager of the Optoelectronics Information Processing and Nanotechnology Programs,
Air Force Office of Scientific Research (AFOSR)